Home
last modified time | relevance | path

Searched refs:MSCC_PHY_WOL_MAC_CONTROL (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/net/phy/
H A Dmscc.c67 #define MSCC_PHY_WOL_MAC_CONTROL 27 macro
385 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_WOL_MAC_CONTROL); in vsc8531_config()
393 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_WOL_MAC_CONTROL, reg_val); in vsc8531_config()
445 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_WOL_MAC_CONTROL); in vsc8541_config()
453 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_WOL_MAC_CONTROL, reg_val); in vsc8541_config()
/OK3568_Linux_fs/kernel/drivers/net/phy/mscc/
H A Dmscc.h76 #define MSCC_PHY_WOL_MAC_CONTROL 27 macro
186 #define MSCC_PHY_WOL_MAC_CONTROL 27 macro
H A Dmscc_main.c317 reg_val = __phy_read(phydev, MSCC_PHY_WOL_MAC_CONTROL); in vsc85xx_wol_set()
322 __phy_write(phydev, MSCC_PHY_WOL_MAC_CONTROL, reg_val); in vsc85xx_wol_set()
366 reg_val = __phy_read(phydev, MSCC_PHY_WOL_MAC_CONTROL); in vsc85xx_wol_get()
477 MSCC_PHY_WOL_MAC_CONTROL, EDGE_RATE_CNTL_MASK, in vsc85xx_edge_rate_cntl_set()