Searched refs:MIIMCFG_CLKSEL_DIV40 (Results 1 – 2 of 2) sorted by relevance
96 writel(MIIMCFG_CLKSEL_DIV40, &mii_regs->mcfg.raw); in pic32_mdio_reset()
106 #define MIIMCFG_CLKSEL_DIV40 0x0020 /* 100Mhz / 40 */ macro