Searched refs:KS2_PSC_BASE (Results 1 – 3 of 3) sorted by relevance
54 ptstat = __raw_readl(KS2_PSC_BASE + PSC_REG_PSTAT); in psc_wait()74 domain_num = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCFG(mod_num)); in psc_get_domain_num()107 v = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCFG(mod_num)); in psc_set_state()124 pdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_PDCTL(domain_num)); in psc_set_state()127 __raw_writel(pdctl, KS2_PSC_BASE + PSC_REG_PDCTL(domain_num)); in psc_set_state()131 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()134 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()137 ptcmd = __raw_readl(KS2_PSC_BASE + PSC_REG_PTCMD); in psc_set_state()139 __raw_writel(ptcmd, KS2_PSC_BASE + PSC_REG_PTCMD); in psc_set_state()161 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_enable_module()[all …]
412 tmp_a = __raw_readl(KS2_PSC_BASE + in ddr3_err_reset_workaround()416 __raw_writel(tmp_a, KS2_PSC_BASE + in ddr3_err_reset_workaround()423 tmp_b = __raw_readl(KS2_PSC_BASE + in ddr3_err_reset_workaround()426 __raw_writel(tmp_b, KS2_PSC_BASE + in ddr3_err_reset_workaround()
162 #define KS2_PSC_BASE 0x02350000 macro