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Searched refs:KS2_DDRPHY_PGSR0_OFFSET (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/
H A Dddr3.c29 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) in ddr3_init_ddrphy()
64 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1) in ddr3_init_ddrphy()
98 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1) in ddr3_init_ddrphy()
393 tmp_a = __raw_readl(KS2_DDR3A_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); in ddr3_err_reset_workaround()
394 tmp_b = __raw_readl(KS2_DDR3B_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); in ddr3_err_reset_workaround()
/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h30 #define KS2_DDRPHY_PGSR0_OFFSET 0x10 macro