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Searched refs:HDMI_ACR_48_0 (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h81 SRI(HDMI_ACR_48_0, DIG, id),\
185 SE_SF(HDMI_ACR_48_0, HDMI_ACR_CTS_48, mask_sh),\
684 uint32_t HDMI_ACR_48_0; member
H A Ddce_stream_encoder.c1412 REG_UPDATE(HDMI_ACR_48_0, HDMI_ACR_CTS_48, audio_clock_info.cts_48khz); in dce110_se_setup_hdmi_audio()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h71 SRI(HDMI_ACR_48_0, DIG, id),\
155 uint32_t HDMI_ACR_48_0; member
H A Ddcn10_stream_encoder.c1343 REG_UPDATE(HDMI_ACR_48_0, HDMI_ACR_CTS_48, audio_clock_info.cts_48khz); in enc1_se_setup_hdmi_audio()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Devergreen_hdmi.c93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
H A Drv770d.h795 #define HDMI_ACR_48_0 0x74bc macro
H A Devergreend.h649 #define HDMI_ACR_48_0 0x70ec macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.h74 SRI(HDMI_ACR_48_0, DIG, id),\
H A Ddcn30_dio_stream_encoder.c759 REG_UPDATE(HDMI_ACR_48_0, HDMI_ACR_CTS_48, audio_clock_info.cts_48khz); in enc3_se_setup_hdmi_audio()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1438 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v6_0_audio_set_acr()
H A Ddce_v10_0.c1507 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v10_0_afmt_update_ACR()
H A Ddce_v11_0.c1549 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v11_0_afmt_update_ACR()