Searched refs:GPIO_SWPORT_DDR (Results 1 – 4 of 4) sorted by relevance
26 #define GPIO_SWPORT_DDR 0x08 macro37 off = REG_PLUS4(GPIO_SWPORT_DDR, bit); in gpio_read()45 #define GPIO_SWPORT_DDR 0x04 macro51 val = readl(gpio_addr + GPIO_SWPORT_DDR); in gpio_read()53 writel(val, gpio_addr + GPIO_SWPORT_DDR); in gpio_read()
23 #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc) macro44 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_input()53 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
29 #define GPIO_SWPORT_DDR 0x04 macro205 gpio_bit_op(bank->regbase, GPIO_SWPORT_DDR, in gpio_irq_set_type()
29 #define GPIO_SWPORT_DDR 0x08 macro217 gpio_bit_op(bank->regbase, GPIO_SWPORT_DDR, in gpio_irq_set_type()