Searched refs:E1000_EIAM (Results 1 – 5 of 5) sorted by relevance
16 #define E1000_EIAM 0x01530 /* Ext. Interrupt Ack Auto Clear Mask - RW */ macro
36 #define E1000_EIAM 0x01530 /* Ext. Interrupt Ack Auto Clear Mask - RW */ macro
1485 u32 regval = rd32(E1000_EIAM); in igb_irq_disable()1487 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()1519 regval = rd32(E1000_EIAM); in igb_irq_enable()1520 wr32(E1000_EIAM, regval | adapter->eims_enable_mask); in igb_irq_enable()
502 regs_buff[18] = rd32(E1000_EIAM); in igb_get_regs()
553 E1000_WRITE_REG(hw, E1000_EIAM, 1 << E1000_VTIVAR_MISC_MAILBOX); in igbvf_intr_enable()5486 regval = E1000_READ_REG(hw, E1000_EIAM); in eth_igb_configure_msix_intr()5529 regval = E1000_READ_REG(hw, E1000_EIAM); in eth_igb_configure_msix_intr()5530 E1000_WRITE_REG(hw, E1000_EIAM, regval | intr_mask); in eth_igb_configure_msix_intr()