Searched refs:DSI1_BASE (Results 1 – 6 of 6) sorted by relevance
37 dsi_base = id ? DSI1_BASE : DSI0_BASE; in dsi_write()46 dsi_base = id ? DSI1_BASE : DSI0_BASE; in dsi_read()56 dsi_base = id ? DSI1_BASE : DSI0_BASE; in dsi_update_bits()
135 regmap_reg_range(DSI1_BASE, DSI1_BASE + DSI_MAX_REGISTER),189 .max_register = DSI1_BASE + DSI_MAX_REGISTER,
17 #define DSI1_BASE 0x60000 macro
205 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in dsi_write()215 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in dsi_read()226 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in dsi_update_bits()300 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in genif_wait_w_pld_fifo_not_full()323 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in genif_wait_cmd_fifo_not_full()346 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in genif_wait_write_fifo_empty()376 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in rk628_dsi_read_from_fifo()981 dsi_base = dsi->id ? DSI1_BASE : DSI0_BASE; in mipi_dphy_power_on()
13 #define DSI1_BASE 0x60000 macro
132 regmap_reg_range(DSI1_BASE, DSI1_BASE + DSI_MAX_REGISTER),283 .max_register = DSI1_BASE + DSI_MAX_REGISTER,