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Searched refs:DPLL_MODE (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_px30.h59 #define DPLL_MODE(n) ((0x3 << (4 + 16)) | ((n) << 4)) macro
H A Dsdram_rv1126.h237 #define DPLL_MODE(n) ((0x3 << (2 + 16)) | ((n) << 2)) macro
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_px30.c104 writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode); in rkclk_set_dpll()
117 writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode); in rkclk_set_dpll()
H A Dsdram_rv1126.c351 writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode); in rkclk_set_dpll()
380 writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode); in rkclk_set_dpll()
/OK3568_Linux_fs/kernel/drivers/ptp/
H A Didt8a340_reg.h215 #define DPLL_MODE 0x0037 macro
H A Dptp_clockmatrix.c1219 err = idtcm_read(idtcm, channel->dpll_n, DPLL_MODE, in idtcm_set_pll_mode()
1230 err = idtcm_write(idtcm, channel->dpll_n, DPLL_MODE, in idtcm_set_pll_mode()