Searched refs:D2H_DEV_D3_ACK (Results 1 – 12 of 12) sorted by relevance
389 #define D2H_DEV_D3_ACK 0x00000001 macro396 #define D2HMB_DS_HOST_SLEEP_ACK D2H_DEV_D3_ACK401 #define D2H_DEV_MB_MASK (D2H_DEV_D3_ACK | D2H_DEV_DS_ENTER_REQ | \
465 #define D2H_DEV_D3_ACK 0x00000001 macro480 #define D2HMB_DS_HOST_SLEEP_ACK D2H_DEV_D3_ACK487 #define D2H_DEV_MB_MASK (D2H_DEV_D3_ACK | D2H_DEV_DS_ENTER_REQ | \
477 #define D2H_DEV_D3_ACK 0x00000001 macro482 #define D2HMB_DS_HOST_SLEEP_ACK D2H_DEV_D3_ACK486 #define D2H_DEV_MB_MASK (D2H_DEV_D3_ACK | D2H_DEV_DS_ENTER_REQ | \
6278 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhd_bus_handle_mb_data()6335 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhdpcie_handle_mb_data()
13032 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhd_bus_handle_mb_data()13098 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhdpcie_handle_mb_data()15577 case D2H_DEV_D3_ACK: in dhd_convert_dsval()
13025 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhd_bus_handle_mb_data()13091 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhdpcie_handle_mb_data()15570 case D2H_DEV_D3_ACK: in dhd_convert_dsval()
9154 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhd_bus_handle_mb_data()9212 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhdpcie_handle_mb_data()
9145 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhd_bus_handle_mb_data()9203 if (d2h_mb_data & D2H_DEV_D3_ACK) { in dhdpcie_handle_mb_data()