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Searched refs:CLK_TOP_ETHER_50M_SEL (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.txt72 <&topckgen CLK_TOP_ETHER_50M_SEL>,
75 <&topckgen CLK_TOP_ETHER_50M_SEL>,
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt2712-clk.h186 #define CLK_TOP_ETHER_50M_SEL 155 macro
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi741 <&topckgen CLK_TOP_ETHER_50M_SEL>;
743 <&topckgen CLK_TOP_ETHER_50M_SEL>;
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt2712.c864 MUX_GATE(CLK_TOP_ETHER_50M_SEL, "ether_50m_sel",