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Searched refs:CLK_TOP_DXCC_SEL (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt6765-clk.h152 #define CLK_TOP_DXCC_SEL 117 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt6765.c435 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel", dxcc_parents,