Searched refs:CLK_SPI_PLL_SEL_SHIFT (Results 1 – 4 of 4) sorted by relevance
170 CLK_SPI_PLL_SEL_SHIFT = 7, enumerator171 CLK_SPI_PLL_SEL_MASK = 1 << CLK_SPI_PLL_SEL_SHIFT,
239 CLK_SPI_PLL_SEL_SHIFT = 14, enumerator240 CLK_SPI_PLL_SEL_MASK = 0x3 << CLK_SPI_PLL_SEL_SHIFT,
391 mux = (con & CLK_SPI_PLL_SEL_MASK) >> CLK_SPI_PLL_SEL_SHIFT; in rk3328_spi_get_clk()407 CLK_SPI_PLL_SEL_GPLL << CLK_SPI_PLL_SEL_SHIFT | in rk3328_spi_set_clk()
489 CLK_SPI_PLL_SEL_DPLL << CLK_SPI_PLL_SEL_SHIFT | in rk3308_spi_set_clk()