Searched refs:CLK_PCIE1L0_PIPE (Results 1 – 4 of 4) sorted by relevance
702 #define CLK_PCIE1L0_PIPE 708 macro
704 #define CLK_PCIE1L0_PIPE 708 macro
635 <&cru CLK_PCIE_AUX2>, <&cru CLK_PCIE1L0_PIPE>;
2364 GATE(CLK_PCIE1L0_PIPE, "clk_pcie1l0_pipe", "clk_pipephy1_pipe_g", 0,