Home
last modified time | relevance | path

Searched refs:CGU_REG_CLKGR1 (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/ingenic/
H A Djz4780-cgu.c30 #define CGU_REG_CLKGR1 0x28 macro
238 clkgr1 = readl(cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
240 writel(clkgr1, cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
394 .gate = { CGU_REG_CLKGR1, 2 },
494 .gate = { CGU_REG_CLKGR1, 3 },
503 .gate = { CGU_REG_CLKGR1, 4 },
512 .gate = { CGU_REG_CLKGR1, 9 },
703 .gate = { CGU_REG_CLKGR1, 0 },
709 .gate = { CGU_REG_CLKGR1, 1 },
715 .gate = { CGU_REG_CLKGR1, 5 },
[all …]
H A Djz4770-cgu.c26 #define CGU_REG_CLKGR1 0x28 macro
174 .gate = { CGU_REG_CLKGR1, 7 },
244 .gate = { CGU_REG_CLKGR1, 9 },
290 .gate = { CGU_REG_CLKGR1, 13 },
321 .gate = { CGU_REG_CLKGR1, 8 },
326 .gate = { CGU_REG_CLKGR1, 10 },
346 .gate = { CGU_REG_CLKGR1, 15 },
386 .gate = { CGU_REG_CLKGR1, 14 },
H A Dx1830-cgu.c24 #define CGU_REG_CLKGR1 0x28 macro
230 .gate = { CGU_REG_CLKGR1, 15 },
262 .gate = { CGU_REG_CLKGR1, 14 },
279 .gate = { CGU_REG_CLKGR1, 4 },
288 .gate = { CGU_REG_CLKGR1, 9 },
428 .gate = { CGU_REG_CLKGR1, 1 },
434 .gate = { CGU_REG_CLKGR1, 11 },