Searched refs:CFGCHIP2_PHY_PLLON (Results 1 – 5 of 5) sorted by relevance
53 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | in phy_on()79 cfgchip2 &= ~CFGCHIP2_PHY_PLLON; in phy_off()
33 CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ | in usb_phy_on()51 CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM, in usb_phy_off()
80 #define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */ macro
117 #define CFGCHIP2_PHY_PLLON BIT(6) macro
387 mask = CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_PHY_PLLON; in da8xx_usb0_clk48_enable()388 val = CFGCHIP2_PHY_PLLON; in da8xx_usb0_clk48_enable()