Searched refs:BUS_WIDTH (Results 1 – 7 of 7) sorted by relevance
55 #define BUS_WIDTH 32 macro57 #define BUS_WIDTH 64 macro
360 __maybe_unused u32 ddr_width = BUS_WIDTH; in ddr3_init_main()
738 if (ddr3_get_min_val(sum_info.data_width, dimm_num, BUS_WIDTH) == 64) {
16 #define BUS_WIDTH 8 /* AXI data bus width in bytes */ macro111 writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes); in axs101_nand_write_buf()145 writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes); in axs101_nand_read_buf()
31 #define BUS_WIDTH 0x00000020 /* x32 devices */ macro423 pcm_data->bus_width = BUS_WIDTH; in lpddr2_nvm_probe()
349 #define BUS_WIDTH 0 macro
2424 writel((1 << BUS_WIDTH), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK); in net2272_rdk2_probe()