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Searched refs:BIT20 (Results 1 – 25 of 188) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/
H A Dhal_com_reg.h833 #define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3
881 #define PHIMR_BCNDMAINT0 BIT20
907 #define PHIMR_BCNDMAINT4 BIT20
932 #define UHIMR_BCNDMAINT0 BIT20
958 #define UHIMR_BCNDMAINT4 BIT20
990 #define IMR_BCNDMAINT0_88E BIT20 // Beacon DMA Interrupt 0
1016 #define IMR_BCNDOK7_88E BIT20 // Beacon Queue DMA OK Interrup 7
1080 #define RCR_PKTCTL_DLEN BIT20 /* While rx path dead lock occurs, reset rx path */
1629 #define SDIO_HIMR_HSISR_IND_MSK BIT20
1655 #define SDIO_HISR_HSISR_IND BIT20
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H A Drtl8723b_spec.h237 #define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0
262 #define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0
223 #define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/include/
H A Dhal_com_reg.h833 #define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3
881 #define PHIMR_BCNDMAINT0 BIT20
907 #define PHIMR_BCNDMAINT4 BIT20
932 #define UHIMR_BCNDMAINT0 BIT20
958 #define UHIMR_BCNDMAINT4 BIT20
990 #define IMR_BCNDMAINT0_88E BIT20 // Beacon DMA Interrupt 0
1016 #define IMR_BCNDOK7_88E BIT20 // Beacon Queue DMA OK Interrup 7
1080 #define RCR_RSVD_BIT20 BIT20 // Reserved
1630 #define SDIO_HIMR_HSISR_IND_MSK BIT20
1656 #define SDIO_HISR_HSISR_IND BIT20
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H A Drtl8812a_spec.h190 #define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0
215 #define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7
H A Drtl8723b_spec.h237 #define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0
262 #define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7
H A Drtl8188f_spec.h244 #define IMR_BCNDMAINT0_8188F BIT20 // Beacon DMA Interrupt 0
269 #define IMR_BCNDOK7_8188F BIT20 // Beacon Queue DMA OK Interrup 7
/OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/include/
H A Dhal_com_reg.h784 #define IMR_BCNDOK3 BIT20 /* Beacon Queue DMA OK Interrup 3 */
832 #define PHIMR_BCNDMAINT0 BIT20
858 #define PHIMR_BCNDMAINT4 BIT20
883 #define UHIMR_BCNDMAINT0 BIT20
909 #define UHIMR_BCNDMAINT4 BIT20
941 #define IMR_BCNDMAINT0_88E BIT20 /* Beacon DMA Interrupt 0 */
967 #define IMR_BCNDOK7_88E BIT20 /* Beacon Queue DMA OK Interrup 7 */
1031 #define RCR_RSVD_BIT20 BIT20 /* Reserved */
1579 #define SDIO_HIMR_HSISR_IND_MSK BIT20
1605 #define SDIO_HISR_HSISR_IND BIT20
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H A Drtl8723b_spec.h211 #define IMR_BCNDMAINT0_8723B BIT20 /* Beacon DMA Interrupt 0 */
236 #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrupt 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/include/
H A Dhal_com_reg.h860 #define IMR_BCNDOK3 BIT20 /* Beacon Queue DMA OK Interrup 3 */
908 #define PHIMR_BCNDMAINT0 BIT20
934 #define PHIMR_BCNDMAINT4 BIT20
959 #define UHIMR_BCNDMAINT0 BIT20
985 #define UHIMR_BCNDMAINT4 BIT20
1017 #define IMR_BCNDMAINT0_88E BIT20 /* Beacon DMA Interrupt 0 */
1043 #define IMR_BCNDOK7_88E BIT20 /* Beacon Queue DMA OK Interrup 7 */
1107 #define RCR_PKTCTL_DLEN BIT20 /* While rx path dead lock occurs, reset rx path */
1667 #define SDIO_HIMR_HSISR_IND_MSK BIT20
1693 #define SDIO_HISR_HSISR_IND BIT20
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H A Drtl8723b_spec.h237 #define IMR_BCNDMAINT0_8723B BIT20 /* Beacon DMA Interrupt 0 */
262 #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrup 7 */
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/
H A Dphydm_dynamictxpower.c166 ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 1); /* Resp TXAGC offset = -3dB*/ in odm_DynamicTxPowerNIC_CE()
176 ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 1); /* Resp TXAGC offset = -3dB*/ in odm_DynamicTxPowerNIC_CE()
186 ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 0); /* Resp TXAGC offset = 0dB*/ in odm_DynamicTxPowerNIC_CE()
256 ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); /*Resp TXAGC offset = -3dB*/ in odm_DynamicTxPowerNIC()
258 ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); /*Resp TXAGC offset = 0dB*/ in odm_DynamicTxPowerNIC()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/include/
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/include/
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/include/
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/include/
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/
H A Drtl8812a_spec.h198 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
223 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/include/
H A Drtl8812a_spec.h197 #define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */
222 #define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */

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