Searched refs:AR71XX_DDR_REG_TAP_CTRL0 (Results 1 – 4 of 4) sorted by relevance
183 writel(DDR_TAP_VAL0, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()227 writel(DDR_TAP_VAL0, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()269 tap = readl(regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()277 writel(val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()332 writel(val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()
299 writel(DDR1_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()405 writel(DDR2_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()420 tap_val = readl(regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()427 writel(tap, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()470 writel(tap_val, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_tap_tuning()
136 writel(memcfg->tap, ddr_regs + AR71XX_DDR_REG_TAP_CTRL0); in ar934x_ddr_init()
215 #define AR71XX_DDR_REG_TAP_CTRL0 0x1c macro