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Searched refs:AR71XX_DDR_REG_CONTROL (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c126 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
132 writel(DDR_CTRL_UPD_EMR2S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
137 writel(DDR_CTRL_UPD_EMR3S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
143 writel(DDR_CTRL_UPD_EMRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
149 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
152 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
155 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
156 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
161 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
167 writel(DDR_CTRL_UPD_EMRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c257 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
265 writel(DDR_CTRL_UPD_EMRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
273 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
277 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
281 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
283 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
291 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
304 writel(DDR_CTRL_UPD_EMR2S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
306 writel(DDR_CTRL_UPD_EMR3S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
339 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/ar934x/
H A Dddr.c70 writel(0x10, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
73 writel(0x20, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
99 writel(0x8, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
105 writel(0x1, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
112 writel(0x2, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
121 writel(0x2, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
124 writel(0x8, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
130 writel(0x1, ddr_regs + AR71XX_DDR_REG_CONTROL); in ar934x_ddr_init()
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h212 #define AR71XX_DDR_REG_CONTROL 0x10 macro