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Searched hist:fe784db32b6550168a145425061e0406221c413b (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_px30.hfe784db32b6550168a145425061e0406221c413b Mon Aug 06 03:59:29 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Add px30_clk_init()

Add support to initialize gpll, bus and peri clock rate.

Change-Id: I84f496094606ac2231ea27ad9072b079c45f9f94
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_px30.cfe784db32b6550168a145425061e0406221c413b Mon Aug 06 03:59:29 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Add px30_clk_init()

Add support to initialize gpll, bus and peri clock rate.

Change-Id: I84f496094606ac2231ea27ad9072b079c45f9f94
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>