Searched hist:fa1e92c6360280447a63422b3844df5abf186577 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/include/ |
| H A D | agilex5_clock_manager.h | fa1e92c6360280447a63422b3844df5abf186577 Thu Oct 24 11:23:42 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update BL2 platform specific functions
Update and initialize the BL2 EL3 functions for agilex5
platform.
Change-Id: I673c622dfe4ff71d77edfa0866ebf6cd7163d793
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_clock_manager.c | fa1e92c6360280447a63422b3844df5abf186577 Thu Oct 24 11:23:42 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update BL2 platform specific functions
Update and initialize the BL2 EL3 functions for agilex5
platform.
Change-Id: I673c622dfe4ff71d77edfa0866ebf6cd7163d793
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
|
| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | bl2_plat_setup.c | fa1e92c6360280447a63422b3844df5abf186577 Thu Oct 24 11:23:42 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): update BL2 platform specific functions
Update and initialize the BL2 EL3 functions for agilex5
platform.
Change-Id: I673c622dfe4ff71d77edfa0866ebf6cd7163d793
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
|