Searched hist:f78c597041fcb6ee7bf1affc270b3178a9e9dba0 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/xilinx/common/include/ |
| H A D | pm_common.h | f78c597041fcb6ee7bf1affc270b3178a9e9dba0 Thu Apr 10 05:49:59 UTC 2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> fix(xilinx): resolve misra rule 12.2 violations
Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.12.2:
- The right hand operand of a shift operator shall lie in the range
zero to one less than the width in bits of the essential type of
the left hand operand.
- Fix:
- Type casted left operand to a larger width than shift.
Change-Id: I662ff57e52d1260e2f1a0de595f19a9143714892
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
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| H A D | pm_api_sys.h | f78c597041fcb6ee7bf1affc270b3178a9e9dba0 Thu Apr 10 05:49:59 UTC 2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> fix(xilinx): resolve misra rule 12.2 violations
Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.12.2:
- The right hand operand of a shift operator shall lie in the range
zero to one less than the width in bits of the essential type of
the left hand operand.
- Fix:
- Type casted left operand to a larger width than shift.
Change-Id: I662ff57e52d1260e2f1a0de595f19a9143714892
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
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