Searched hist:f43e9f57dc37a806bcd5e25a46b9f9bb1f365a64 (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x3.S | f43e9f57dc37a806bcd5e25a46b9f9bb1f365a64 Tue Dec 12 11:17:19 UTC 2023 Harrison Mutai <harrison.mutai@arm.com> fix(cpus): workaround for Cortex X3 erratum 2743088
Cortex X3 erratum 2743088 is a Cat B erratum that applies to all
revisions <= r1p1 and is fixed in r1p2. The workaround is to add a DSB
instruction before the ISB of the powerdown code sequence specified in
the TRM.
SDEN documentation: https://developer.arm.com/documentation/2055130
Change-Id: I2c8577e3ca0781af8b1c3912e577d3bd77f92709
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
|
| /rk3399_ARM-atf/services/std_svc/errata_abi/ |
| H A D | errata_abi_main.c | f43e9f57dc37a806bcd5e25a46b9f9bb1f365a64 Tue Dec 12 11:17:19 UTC 2023 Harrison Mutai <harrison.mutai@arm.com> fix(cpus): workaround for Cortex X3 erratum 2743088
Cortex X3 erratum 2743088 is a Cat B erratum that applies to all
revisions <= r1p1 and is fixed in r1p2. The workaround is to add a DSB
instruction before the ISB of the powerdown code sequence specified in
the TRM.
SDEN documentation: https://developer.arm.com/documentation/2055130
Change-Id: I2c8577e3ca0781af8b1c3912e577d3bd77f92709
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | f43e9f57dc37a806bcd5e25a46b9f9bb1f365a64 Tue Dec 12 11:17:19 UTC 2023 Harrison Mutai <harrison.mutai@arm.com> fix(cpus): workaround for Cortex X3 erratum 2743088
Cortex X3 erratum 2743088 is a Cat B erratum that applies to all
revisions <= r1p1 and is fixed in r1p2. The workaround is to add a DSB
instruction before the ISB of the powerdown code sequence specified in
the TRM.
SDEN documentation: https://developer.arm.com/documentation/2055130
Change-Id: I2c8577e3ca0781af8b1c3912e577d3bd77f92709
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | f43e9f57dc37a806bcd5e25a46b9f9bb1f365a64 Tue Dec 12 11:17:19 UTC 2023 Harrison Mutai <harrison.mutai@arm.com> fix(cpus): workaround for Cortex X3 erratum 2743088
Cortex X3 erratum 2743088 is a Cat B erratum that applies to all
revisions <= r1p1 and is fixed in r1p2. The workaround is to add a DSB
instruction before the ISB of the powerdown code sequence specified in
the TRM.
SDEN documentation: https://developer.arm.com/documentation/2055130
Change-Id: I2c8577e3ca0781af8b1c3912e577d3bd77f92709
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
|