"f3dff695e155469c2c62edb7f3d571df8b3b20ad" (history) in projects: rk3399_rockchip-uboot

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Searched hist:f3dff695e155469c2c62edb7f3d571df8b3b20ad (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/include/
H A D	fsl_usb.h	`f3dff695e155469c2c62edb7f3d571df8b3b20ad Fri Oct 17 03:42:07 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers : usb: fsl: Implement usb Erratum A007798 workaround Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>`
/rk3399_rockchip-uboot/drivers/usb/host/
H A D	ehci-fsl.c	`f3dff695e155469c2c62edb7f3d571df8b3b20ad Fri Oct 17 03:42:07 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers : usb: fsl: Implement usb Erratum A007798 workaround Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>`
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A D	cmd_errata.c	`f3dff695e155469c2c62edb7f3d571df8b3b20ad Fri Oct 17 03:42:07 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers : usb: fsl: Implement usb Erratum A007798 workaround Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>`
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A D	config_mpc85xx.h	`f3dff695e155469c2c62edb7f3d571df8b3b20ad Fri Oct 17 03:42:07 UTC 2014 Nikhil Badola <nikhil.badola@freescale.com> drivers : usb: fsl: Implement usb Erratum A007798 workaround Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>`