| #
79a34b71 |
| 25-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
09bfd962 |
| 01-Dec-2016 |
Tony O'Brien <tony.obrien@alliedtelesis.co.nz> |
mpc85xx: pcie: Implement workaround for Erratum A007815
The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediat
mpc85xx: pcie: Implement workaround for Erratum A007815
The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller.
Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> [York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
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| #
06ad970b |
| 24-Oct-2016 |
Darwin Dingel <darwin.dingel@alliedtelesis.co.nz> |
powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907
Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead.
Reviewed-
powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907
Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead.
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz> Cc: York Sun <york.sun@nxp.com> [York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
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| #
63659ff3 |
| 28-Dec-2016 |
York Sun <york.sun@nxp.com> |
powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
Use Kconfig to select errata workaround.
Signed-off-by: York Sun <york.sun@nxp.com>
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| #
6b29a395 |
| 30-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
d46a4a13 |
| 18-Nov-2016 |
York Sun <york.sun@nxp.com> |
powerpc: B4860QDS: Remove macro CONFIG_B4860QDS
Use CONFIG_TARGET_B4860QDS instead.
Signed-off-by: York Sun <york.sun@nxp.com>
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| #
e71372cb |
| 18-Nov-2016 |
York Sun <york.sun@nxp.com> |
powerpc: P4080: Remove macro CONFIG_PPC_P4080
Replace CONFIG_PPC_P4080 with ARCH_P4080 in Kconfig and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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| #
5e5fdd2d |
| 18-Nov-2016 |
York Sun <york.sun@nxp.com> |
powerpc: P3041: Remove macro CONFIG_PPC_P3041
Replace CONFIG_PPC_P3041 with ARCH_P3041 in Kconfig and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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| #
ce040c83 |
| 18-Nov-2016 |
York Sun <york.sun@nxp.com> |
powerpc: P2041: Remove macro CONFIG_PPC_P2041
Replace CONFIG_PPC_P2041 with ARCH_P2041 in Kconfig and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
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| #
cd85bec3 |
| 27-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
a994b3de |
| 16-Dec-2015 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired va
driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired value after DDR initialization has completed.
When DDR controller is configured to operate in auto-precharge mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
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| #
e6e3faa5 |
| 15-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
a07bdad7 |
| 20-Nov-2015 |
Shengzhou Liu <Shengzhou.Liu@freescale.com> |
fsl/errata: move fsl_errata.h to common directory
move arch/powerpc/include/asm/fsl_errata.h to include/fsl_errata.h to make it public for both ARM and POWER SoCs.
Signed-off-by: Shengzhou Liu <She
fsl/errata: move fsl_errata.h to common directory
move arch/powerpc/include/asm/fsl_errata.h to include/fsl_errata.h to make it public for both ARM and POWER SoCs.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: fix soc.h path in fsl_errata.h] Reviewed-by: York Sun <yorksun@freescale.com>
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| #
d81572c2 |
| 05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
0dc78ff8 |
| 21-Nov-2014 |
Nikhil Badola <nikhil.badola@freescale.com> |
drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the controller to let ongoing ULPI transaction complete. This prevents corruption of ULPI
drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the controller to let ongoing ULPI transaction complete. This prevents corruption of ULPI Function Control Register which eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
272a1acf |
| 08-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
b24f6d40 |
| 13-Nov-2014 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
powerpc/b4860qds: add workaround for XFI
XFI does not work stable on current board, it's due to heat sink issue, to make it work stable the board needs additional heat sink, enable two XFI lanes onl
powerpc/b4860qds: add workaround for XFI
XFI does not work stable on current board, it's due to heat sink issue, to make it work stable the board needs additional heat sink, enable two XFI lanes only. Right now we do not have such an erratum for the issue, so use a define CONFIG_SYS_FSL_B4860QDS_XFI_ERR to identify it. The workaround will only be used in XFI protocols and only if the hwconfig indicates that XFI is prefered.
A new VSC3308 config function is used instead of re-use the original function, to avoid making the function complex and ugly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
e7f533cd |
| 30-Oct-2014 |
Zhao Qiang <B45475@freescale.com> |
powerpc/mpc85xx: modify erratum A007186
T2080 v1.0 has this errata while v1.1 has fixed this errata by hardware, add a new function has_errata_a007186 to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN f
powerpc/mpc85xx: modify erratum A007186
T2080 v1.0 has this errata while v1.1 has fixed this errata by hardware, add a new function has_errata_a007186 to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first, if the sil has errata a007186, then run the errata code, if not, doesn't run the code.
Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
31530e0b |
| 29-Oct-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
board/t104xrdb: Conditional workaround of errata A-008044
Workaround of Errata A-008044 was implemented without errata number and it is enabled by default. Errata A-008044 is only valid for T1040 Re
board/t104xrdb: Conditional workaround of errata A-008044
Workaround of Errata A-008044 was implemented without errata number and it is enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0.
So put errata number and make it conditional.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
9f074e67 |
| 29-Oct-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx:Put errata number for T104x NAND boot issue
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7
powerpc/mpc85xx:Put errata number for T104x NAND boot issue
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using IFC_A[16:31] lines are not accessible.
Workaround is already in-place. Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
85bafb6d |
| 25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
f3dff695 |
| 17-Oct-2014 |
Nikhil Badola <nikhil.badola@freescale.com> |
drivers : usb: fsl: Implement usb Erratum A007798 workaround
Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
drivers : usb: fsl: Implement usb Erratum A007798 workaround
Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
c26c80a1 |
| 30-Sep-2014 |
Nikhil Badola <nikhil.badola@freescale.com> |
drivers: usb: fsl: Move USB Errata checking code
Move USB Errata checking code from "arch/powerpc" to architecture independent file "fsl_usb.h" so that errata(s) become independent of the architectu
drivers: usb: fsl: Move USB Errata checking code
Move USB Errata checking code from "arch/powerpc" to architecture independent file "fsl_usb.h" so that errata(s) become independent of the architecture. For each erratum checking function for PPC arch, define a nop function for non PPC arch for successful compilation in either case
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
dab5e346 |
| 16-Jul-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
Conflicts: boards.cfg
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| #
ed1d98d8 |
| 25-Jun-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
|