Searched hist:ede3a236a4f769ba638126e985299c688ae8428b (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a65.S | ede3a236a4f769ba638126e985299c688ae8428b Thu Oct 16 20:50:07 UTC 2025 Xialin Liu <xialin.liu@arm.com> fix(cpus): workaround for Cortex-A65 erratum 1227419
Cortex-A65 erratum 1227419 is a Cat B erratum that applies
to r0p0, r1p0, it is fixed in r1p1.
This erratum can be avoided by setting CPUACTLR_EL1[51] to 1.
This bit disables the cross-thread sharing in instruction uTLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1065159/latest/
Change-Id: I42371e7d53fce3a7e085bf0b348f080fa323fb51
Signed-off-by: Xialin Liu <xialin.liu@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | ede3a236a4f769ba638126e985299c688ae8428b Thu Oct 16 20:50:07 UTC 2025 Xialin Liu <xialin.liu@arm.com> fix(cpus): workaround for Cortex-A65 erratum 1227419
Cortex-A65 erratum 1227419 is a Cat B erratum that applies
to r0p0, r1p0, it is fixed in r1p1.
This erratum can be avoided by setting CPUACTLR_EL1[51] to 1.
This bit disables the cross-thread sharing in instruction uTLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1065159/latest/
Change-Id: I42371e7d53fce3a7e085bf0b348f080fa323fb51
Signed-off-by: Xialin Liu <xialin.liu@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | ede3a236a4f769ba638126e985299c688ae8428b Thu Oct 16 20:50:07 UTC 2025 Xialin Liu <xialin.liu@arm.com> fix(cpus): workaround for Cortex-A65 erratum 1227419
Cortex-A65 erratum 1227419 is a Cat B erratum that applies
to r0p0, r1p0, it is fixed in r1p1.
This erratum can be avoided by setting CPUACTLR_EL1[51] to 1.
This bit disables the cross-thread sharing in instruction uTLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1065159/latest/
Change-Id: I42371e7d53fce3a7e085bf0b348f080fa323fb51
Signed-off-by: Xialin Liu <xialin.liu@arm.com>
|