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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_px30.hdd472d4ff5b10cfcbdc7e46ec8efef420dc7b003 Thu Jun 21 10:23:56 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Change apll rate to 600MHz

The initial voltage may be too low for 816MHz and it is enough for
600MHz.

Change-Id: Ifa1438d8d3056c9fb8fb3e578a28c26682a27e46
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_px30.cdd472d4ff5b10cfcbdc7e46ec8efef420dc7b003 Thu Jun 21 10:23:56 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Change apll rate to 600MHz

The initial voltage may be too low for 816MHz and it is enough for
600MHz.

Change-Id: Ifa1438d8d3056c9fb8fb3e578a28c26682a27e46
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>