Searched hist:da53ba0219c65c11a673ec11c0c2ad371c74251f (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-spear/ |
| H A D | spr_misc.h | da53ba0219c65c11a673ec11c0c2ad371c74251f Wed Sep 02 09:10:58 UTC 2015 Stefan Roese <sr@denx.de> arm: spear: Add command to switch between 1-bit HW ECC and SW BCH4
This patch adds the "nandecc" command to switch between the SPEAr600 internal
1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND
chips with a stronger ECC than 1-bit, as on the x600. And to dynamically
switch between both ECC schemes for backwards compatibility.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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| /rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/spear/ |
| H A D | cpu.c | da53ba0219c65c11a673ec11c0c2ad371c74251f Wed Sep 02 09:10:58 UTC 2015 Stefan Roese <sr@denx.de> arm: spear: Add command to switch between 1-bit HW ECC and SW BCH4
This patch adds the "nandecc" command to switch between the SPEAr600 internal
1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND
chips with a stronger ECC than 1-bit, as on the x600. And to dynamically
switch between both ECC schemes for backwards compatibility.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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