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Searched hist:d101530a8a47a7b6b0c000f115e50e626ee5ab21 (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_px30.hd101530a8a47a7b6b0c000f115e50e626ee5ab21 Fri Aug 03 10:39:23 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Add support to set vopl aclk and dclk rate

Change-Id: I31376ebb8d1d40d46ad4e2b6421b65ac7fae096d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_px30.cd101530a8a47a7b6b0c000f115e50e626ee5ab21 Fri Aug 03 10:39:23 UTC 2018 Finley Xiao <finley.xiao@rock-chips.com> rockchip: clk: px30: Add support to set vopl aclk and dclk rate

Change-Id: I31376ebb8d1d40d46ad4e2b6421b65ac7fae096d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>