Home
last modified time | relevance | path

Searched hist:bb8215f437a7c948eec82a6abe754c226978bd6d (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/include/
H A Dspi_flash.hbb8215f437a7c948eec82a6abe754c226978bd6d Mon Mar 11 06:08:08 UTC 2013 Simon Glass <sjg@chromium.org> sf: Enable FDT-based configuration and memory mapping

Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass <sjg@chromium.org>
H A Dfdtdec.hbb8215f437a7c948eec82a6abe754c226978bd6d Mon Mar 11 06:08:08 UTC 2013 Simon Glass <sjg@chromium.org> sf: Enable FDT-based configuration and memory mapping

Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass <sjg@chromium.org>
/rk3399_rockchip-uboot/drivers/mtd/spi/
H A Dspi_flash.c0d3b596aa35fd828f2147c6d3c86d4e2730f7b29 Mon May 27 10:14:14 UTC 2013 Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> sf: Fix sf read for memory-mapped SPI flashes

Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.

The return is missing in below patch
"sf: Enable FDT-based configuration and memory mapping"
(sha1: bb8215f437a7c948eec82a6abe754c226978bd6d)

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
bb8215f437a7c948eec82a6abe754c226978bd6d Mon Mar 11 06:08:08 UTC 2013 Simon Glass <sjg@chromium.org> sf: Enable FDT-based configuration and memory mapping

Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass <sjg@chromium.org>
/rk3399_rockchip-uboot/lib/
H A Dfdtdec.cbb8215f437a7c948eec82a6abe754c226978bd6d Mon Mar 11 06:08:08 UTC 2013 Simon Glass <sjg@chromium.org> sf: Enable FDT-based configuration and memory mapping

Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass <sjg@chromium.org>