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| H A D | cru_rk3128.h | b10789f201da9e44f3a31936df7d311c2ce75c83 Fri Dec 01 23:14:55 UTC 2017 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> UPSTREAM: rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASK
The PLL selector field for NANDC is only 2 bits wide.
This fixes an 'int-overflow on shift' warning.
Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
Change-Id: I4d6d7c51633eb7cd0fbfb1c6b7c501cf8c0fcf81
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cd401abcd532c59cdaaf6ffeed762386c1813e58)
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