Searched hist:a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_n1.h | a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 Mon Jun 24 16:23:50 UTC 2019 lauwal01 <lauren.wehrmeister@arm.com> Workaround for Neoverse N1 erratum 1073348
Neoverse N1 erratum 1073348 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which disables static prediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n1.S | a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 Mon Jun 24 16:23:50 UTC 2019 lauwal01 <lauren.wehrmeister@arm.com> Workaround for Neoverse N1 erratum 1073348
Neoverse N1 erratum 1073348 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which disables static prediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 Mon Jun 24 16:23:50 UTC 2019 lauwal01 <lauren.wehrmeister@arm.com> Workaround for Neoverse N1 erratum 1073348
Neoverse N1 erratum 1073348 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which disables static prediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 Mon Jun 24 16:23:50 UTC 2019 lauwal01 <lauren.wehrmeister@arm.com> Workaround for Neoverse N1 erratum 1073348
Neoverse N1 erratum 1073348 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which disables static prediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
|