Searched hist:"9551 f4e55c19cba96b1187b82dcea9bd2512f758" (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | conf.mk | 9551f4e55c19cba96b1187b82dcea9bd2512f758 Mon Oct 08 09:00:02 UTC 2018 Jens Wiklander <jens.wiklander@linaro.org> core: juno: workaround cortex-a57 errata 808870
Workaround errata 808870:
Unconditional VLDM instructions might cause an alignment fault even
though the address is aligned
Products Affected: Cortex-A57 MPCore.
Present in: r0p0
The workaround is to avoid generating the problematic instructions in
AArch32 TA.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/ |
| H A D | arm.mk | 9551f4e55c19cba96b1187b82dcea9bd2512f758 Mon Oct 08 09:00:02 UTC 2018 Jens Wiklander <jens.wiklander@linaro.org> core: juno: workaround cortex-a57 errata 808870
Workaround errata 808870:
Unconditional VLDM instructions might cause an alignment fault even
though the address is aligned
Products Affected: Cortex-A57 MPCore.
Present in: r0p0
The workaround is to avoid generating the problematic instructions in
AArch32 TA.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|