Searched hist:"9400 b40ea4c71153a63c1f1cdaa416d45a325ec5" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/plat/mediatek/mt8173/aarch64/ |
| H A D | plat_helpers.S | 9400b40ea4c71153a63c1f1cdaa416d45a325ec5 Thu Nov 26 14:52:15 UTC 2015 Juan Castillo <juan.castillo@arm.com> Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
disabled before any of the control registers are programmed. The
PL011 driver included in TF does not disable the UART, so the
initialization in BL2 and BL31 is violating this requirement
(and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011
console driver to disable the UART before programming the
control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
|
| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | pl011.h | 9400b40ea4c71153a63c1f1cdaa416d45a325ec5 Thu Nov 26 14:52:15 UTC 2015 Juan Castillo <juan.castillo@arm.com> Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
disabled before any of the control registers are programmed. The
PL011 driver included in TF does not disable the UART, so the
initialization in BL2 and BL31 is violating this requirement
(and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011
console driver to disable the UART before programming the
control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
|
| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | arm_helpers.S | 9400b40ea4c71153a63c1f1cdaa416d45a325ec5 Thu Nov 26 14:52:15 UTC 2015 Juan Castillo <juan.castillo@arm.com> Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
disabled before any of the control registers are programmed. The
PL011 driver included in TF does not disable the UART, so the
initialization in BL2 and BL31 is violating this requirement
(and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011
console driver to disable the UART before programming the
control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
|
| /rk3399_ARM-atf/plat/nvidia/tegra/common/aarch64/ |
| H A D | tegra_helpers.S | 9400b40ea4c71153a63c1f1cdaa416d45a325ec5 Thu Nov 26 14:52:15 UTC 2015 Juan Castillo <juan.castillo@arm.com> Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
disabled before any of the control registers are programmed. The
PL011 driver included in TF does not disable the UART, so the
initialization in BL2 and BL31 is violating this requirement
(and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011
console driver to disable the UART before programming the
control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
|