Searched hist:"84 af89563e1b17def844d3672bc601ae51f0257f" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/ti/k3/board/lite/ |
| H A D | board.mk | 84af89563e1b17def844d3672bc601ae51f0257f Wed Dec 09 23:52:50 UTC 2020 Andrew F. Davis <afd@ti.com> ti: k3: Introduce lite device board support
Add device support for the 'lite' K3 devices. These will use modified
device addresses and allow for fewer cores to save memory.
Note: This family of devices are characterized by a single cluster
of ARMv8 processor upto a max of 4 processors and lack of a level 3
cache.
The first generation of this family is introduced with AM642.
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I8cd2c1c9a9434646d0c72fca3162dd5bc9bd692a
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| /rk3399_ARM-atf/plat/ti/k3/board/lite/include/ |
| H A D | board_def.h | 84af89563e1b17def844d3672bc601ae51f0257f Wed Dec 09 23:52:50 UTC 2020 Andrew F. Davis <afd@ti.com> ti: k3: Introduce lite device board support
Add device support for the 'lite' K3 devices. These will use modified
device addresses and allow for fewer cores to save memory.
Note: This family of devices are characterized by a single cluster
of ARMv8 processor upto a max of 4 processors and lack of a level 3
cache.
The first generation of this family is introduced with AM642.
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I8cd2c1c9a9434646d0c72fca3162dd5bc9bd692a
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