Searched hist:"7 f69a40697c3cc64e3fc553f6b50c72b97238dc9" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x3.S | 7f69a40697c3cc64e3fc553f6b50c72b97238dc9 Tue Feb 27 21:13:17 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-X3 erratum 2372204
Cortex-X3 erratum 2372204 is a Cat B erratum that applies to revisions
r0p0 and r1p0. It is fixed in r1p1.
The workaround is to set bit[40] of CPUACTLR2_EL1 to disable folding
of demand requests into older prefetches with L2 miss requests
outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: Iad28f8625c84186fbd8049406d139d4f15c6e069
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/services/std_svc/errata_abi/ |
| H A D | errata_abi_main.c | 7f69a40697c3cc64e3fc553f6b50c72b97238dc9 Tue Feb 27 21:13:17 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-X3 erratum 2372204
Cortex-X3 erratum 2372204 is a Cat B erratum that applies to revisions
r0p0 and r1p0. It is fixed in r1p1.
The workaround is to set bit[40] of CPUACTLR2_EL1 to disable folding
of demand requests into older prefetches with L2 miss requests
outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: Iad28f8625c84186fbd8049406d139d4f15c6e069
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 7f69a40697c3cc64e3fc553f6b50c72b97238dc9 Tue Feb 27 21:13:17 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-X3 erratum 2372204
Cortex-X3 erratum 2372204 is a Cat B erratum that applies to revisions
r0p0 and r1p0. It is fixed in r1p1.
The workaround is to set bit[40] of CPUACTLR2_EL1 to disable folding
of demand requests into older prefetches with L2 miss requests
outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: Iad28f8625c84186fbd8049406d139d4f15c6e069
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 7f69a40697c3cc64e3fc553f6b50c72b97238dc9 Tue Feb 27 21:13:17 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-X3 erratum 2372204
Cortex-X3 erratum 2372204 is a Cat B erratum that applies to revisions
r0p0 and r1p0. It is fixed in r1p1.
The workaround is to set bit[40] of CPUACTLR2_EL1 to disable folding
of demand requests into older prefetches with L2 miss requests
outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: Iad28f8625c84186fbd8049406d139d4f15c6e069
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|