Home
last modified time | relevance | path

Searched hist:"7 bf1a7aaaa41034587e43d5805b42da83090b85b" (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcortex_a77.h7bf1a7aaaa41034587e43d5805b42da83090b85b Wed Jun 08 20:27:00 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(errata): workaround for Cortex-A77 erratum 2356587

Cortex-A77 erratum 2356587 is a cat B erratum that applies to revisions
r0p0 - r1p1 and is still open. The workaround is to set bit[0] of
CPUACTLR2_EL1 to force PLDW/PFRM ST to behave like PLD/PRFM LD and not
cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1152370/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I243cfd587bca06ffd2a7be5bce28f8d2c5e68230
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_a77.S7bf1a7aaaa41034587e43d5805b42da83090b85b Wed Jun 08 20:27:00 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(errata): workaround for Cortex-A77 erratum 2356587

Cortex-A77 erratum 2356587 is a cat B erratum that applies to revisions
r0p0 - r1p1 and is still open. The workaround is to set bit[0] of
CPUACTLR2_EL1 to force PLDW/PFRM ST to behave like PLD/PRFM LD and not
cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1152370/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I243cfd587bca06ffd2a7be5bce28f8d2c5e68230
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst7bf1a7aaaa41034587e43d5805b42da83090b85b Wed Jun 08 20:27:00 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(errata): workaround for Cortex-A77 erratum 2356587

Cortex-A77 erratum 2356587 is a cat B erratum that applies to revisions
r0p0 - r1p1 and is still open. The workaround is to set bit[0] of
CPUACTLR2_EL1 to force PLDW/PFRM ST to behave like PLD/PRFM LD and not
cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1152370/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I243cfd587bca06ffd2a7be5bce28f8d2c5e68230
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk7bf1a7aaaa41034587e43d5805b42da83090b85b Wed Jun 08 20:27:00 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(errata): workaround for Cortex-A77 erratum 2356587

Cortex-A77 erratum 2356587 is a cat B erratum that applies to revisions
r0p0 - r1p1 and is still open. The workaround is to set bit[0] of
CPUACTLR2_EL1 to force PLDW/PFRM ST to behave like PLD/PRFM LD and not
cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1152370/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I243cfd587bca06ffd2a7be5bce28f8d2c5e68230