Searched hist:"7 af2131787ed1e5a4fea17f17d13967d13f7d9ee" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_image_desc.c | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | uniphier_io_storage.c | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | uniphier.h | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | uniphier_bl2_setup.c | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | platform.mk | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| /rk3399_ARM-atf/plat/socionext/uniphier/include/ |
| H A D | platform_def.h | 7af2131787ed1e5a4fea17f17d13967d13f7d9ee Fri Jan 17 04:46:48 UTC 2020 Masahiro Yamada <yamada.masahiro@socionext.com> uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep
quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse
a single set of BL images for other SoC/board without re-compiling TF-A
at all. This will also keep the code cleaner because it avoids #ifdef
around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really
position-independent now. You can load them anywhere irrespective of
their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|