| #
496ea77a |
| 16-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "uniphier: increase BL33 max size and GZIP temporary buffer size" into integration
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| #
39784f2a |
| 05-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: increase BL33 max size and GZIP temporary buffer size
The current BL33 size is large enough for U-Boot, but we need to increase the limit to use other boot loaders such as edk2.
Increase
uniphier: increase BL33 max size and GZIP temporary buffer size
The current BL33 size is large enough for U-Boot, but we need to increase the limit to use other boot loaders such as edk2.
Increase the buffer size used for GZIP decompression too.
BL33 max size (UNIPHIER_BL33_MAX_SIZE): 1MB -> 8MB GZIP buffer (UNIPHIER_IMAGE_BUF_SIZE): 1MB -> 8MB
Increasing the block buffer size (UNIPHIER_BLOCK_BUF_SIZE) is not required, but I increased it too to make it work more efficiently.
Change-Id: I4fa6d795bed9ab9ada7f8f616c7d47076139e3a8 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
a1463c8e |
| 09-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "uniphier: shrink UNIPHIER_ROM_REGION_SIZE" into integration
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| #
548654bc |
| 06-Mar-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: shrink UNIPHIER_ROM_REGION_SIZE
Currently, the ROM region is needlessly too large.
The on-chip SRAM region of the next SoC will start from 0x04000000, and this will cause the region overl
uniphier: shrink UNIPHIER_ROM_REGION_SIZE
Currently, the ROM region is needlessly too large.
The on-chip SRAM region of the next SoC will start from 0x04000000, and this will cause the region overlap.
Mapping 0x04000000 for the ROM is enough.
Change-Id: I85ce0bb1120ebff2e3bc7fd13dc0fd15dfff5ff6 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
f7427da1 |
| 25-Feb-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge "uniphier: make on-chip SRAM region configurable" into integration
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| #
b3add9cb |
| 14-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "uniphier" into integration
* changes: uniphier: make I/O register region configurable uniphier: make PSCI related base address configurable uniphier: make counter con
Merge changes from topic "uniphier" into integration
* changes: uniphier: make I/O register region configurable uniphier: make PSCI related base address configurable uniphier: make counter control base address configurable uniphier: make UART base address configurable uniphier: make pinmon base address configurable uniphier: make NAND controller base address configurable uniphier: make eMMC controller base address configurable
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| #
8eaffdf7 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make on-chip SRAM region configurable
The on-chip SRAM region will be changed in the next SoC. Make it configurable. Also, split the mmap code into a new helper function so that it can be
uniphier: make on-chip SRAM region configurable
The on-chip SRAM region will be changed in the next SoC. Make it configurable. Also, split the mmap code into a new helper function so that it can be re-used for another boot mode.
Change-Id: I89f40432bf852a58ebc9be5d9dec4136b8dc010b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
bda9cd70 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e43ff2b0408577919b0b72849c3e1e5ce0758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
070dcbf5 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357ad5e922cdd3d785355edf Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
0281e60c |
| 27-Jan-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP ba
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP base address as a function parameter uniphier: set buffer offset and length for io_block dynamically uniphier: use more mmap_add_dynamic_region() for loading images bl_common: add BL_END macro uniphier: turn on ENABLE_PIE TSP: add PIE support BL2_AT_EL3: add PIE support BL31: discard .dynsym .dynstr .hash sections to make ENABLE_PIE work PIE: pass PIE options only to BL31 Build: support per-BL LDFLAGS
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| #
7af21317 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep quite similar architecture, but the memory base will be changed.
The
uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse a single set of BL images for other SoC/board without re-compiling TF-A at all. This will also keep the code cleaner because it avoids #ifdef around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really position-independent now. You can load them anywhere irrespective of their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
b79b3177 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: set buffer offset and length for io_block dynamically
Currently, the .buffer field in io_block_dev_spec is statically set, which is not handy for PIE.
Towards the goal of making this real
uniphier: set buffer offset and length for io_block dynamically
Currently, the .buffer field in io_block_dev_spec is statically set, which is not handy for PIE.
Towards the goal of making this really position-independent, set the buffer length and length in the uniphier_io_block_setup() function.
Change-Id: I22b20d7b58d6ffd38f64f967a2820fca4bd7dade Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
b5dd85f2 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: use more mmap_add_dynamic_region() for loading images
Currently, uniphier_bl2_mmap hard-codes the memory region needed for loading other images.
Towards the goal of making this really pos
uniphier: use more mmap_add_dynamic_region() for loading images
Currently, uniphier_bl2_mmap hard-codes the memory region needed for loading other images.
Towards the goal of making this really position-independent, call mmap_add_dynamic_region() before that region gets accessed.
Change-Id: Ieb505b91ccf2483e5f1a280accda564b33f19f11 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
df42c311 |
| 31-Jul-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "uniphier: fix typo and coding style" into integration
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| #
4dd4bde4 |
| 26-Jul-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: fix typo and coding style
Fix the typo "warn" -> "warm".
Also fix the following checkpatch.pl warnings:
CHECK: Prefer using the BIT macro CHECK: No space is necessary after a cast
uniphier: fix typo and coding style
Fix the typo "warn" -> "warm".
Also fix the following checkpatch.pl warnings:
CHECK: Prefer using the BIT macro CHECK: No space is necessary after a cast CHECK: Alignment should match open parenthesis CHECK: Unnecessary parentheses around uniphier_io_policies[image_id].dev_handle
Change-Id: Ic11eea2668c4bf2d1e8f089e6338ba7b7156d80b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
6f2ad3a9 |
| 01-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1656 from masahir0y/uniphier
uniphier: clean-up and improve SCP handling code
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| #
8be7850f |
| 04-Oct-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
6d4f6aea |
| 22-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1528 from antonio-nino-diaz-arm/an/libc
libc: Cleanup library
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| #
93c78ed2 |
| 16-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb03
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
10787b05 |
| 02-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1249 from masahir0y/uniphier
uniphier: fix and improve memory layout
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| #
4f557c77 |
| 02-Feb-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: add ULL to physical address literals
Looks like this is requirement in the pre-merge static analysis.
misra_violation: [Required] MISRA C-2012 Rule 7.2 violation: Unsigned constants must
uniphier: add ULL to physical address literals
Looks like this is requirement in the pre-merge static analysis.
misra_violation: [Required] MISRA C-2012 Rule 7.2 violation: Unsigned constants must be declared with U or u suffix.
Adding ULL as requested. I used ULL() macros for BL*_{BASE,LIMIT} because they are referenced from linker scripts.
Requested-by: David Cunado <david.cunado@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
9c740a58 |
| 30-Jan-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: allocate xlat region of on-chip SRAM only when needed
Currently, the xlat region of the on-chip SRAM is always allocated for all BL images.
The access to the on-chip SRAM is necessary for
uniphier: allocate xlat region of on-chip SRAM only when needed
Currently, the xlat region of the on-chip SRAM is always allocated for all BL images.
The access to the on-chip SRAM is necessary for loading images from a USB memory device (i.e. when updating firmware), so unneeded for the usual boot procedure.
To avoid this waste, allocate the xlat region dynamically only for BL2, and only when it is necessary.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
1502c4e1 |
| 13-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #974 from masahir0y/uniphier
UniPhier Initial Support
|