Searched hist:"77 feb745e42296c553c33bcaea5be3304168eff3" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_x3.h | 77feb745e42296c553c33bcaea5be3304168eff3 Wed Jan 22 00:12:35 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | errata_common.c | 77feb745e42296c553c33bcaea5be3304168eff3 Wed Jan 22 00:12:35 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| H A D | cpu-ops.mk | 77feb745e42296c553c33bcaea5be3304168eff3 Wed Jan 22 00:12:35 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x3.S | 77feb745e42296c553c33bcaea5be3304168eff3 Wed Jan 22 00:12:35 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 77feb745e42296c553c33bcaea5be3304168eff3 Wed Jan 22 00:12:35 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/
Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|