xref: /rk3399_ARM-atf/include/lib/cpus/aarch64/cortex_x3.h (revision 1eb8983f6f5a3cef65e6ac524036268ebf92b74f)
1cf58b2d4SBoyan Karatotev /*
2*77feb745SGovindraj Raja  * Copyright (c) 2021-2025, Arm Limited. All rights reserved.
3cf58b2d4SBoyan Karatotev  *
4cf58b2d4SBoyan Karatotev  * SPDX-License-Identifier: BSD-3-Clause
5cf58b2d4SBoyan Karatotev  */
6cf58b2d4SBoyan Karatotev 
7cf58b2d4SBoyan Karatotev #ifndef CORTEX_X3_H
8cf58b2d4SBoyan Karatotev #define CORTEX_X3_H
9cf58b2d4SBoyan Karatotev 
10cf58b2d4SBoyan Karatotev #define CORTEX_X3_MIDR				U(0x410FD4E0)
11cf58b2d4SBoyan Karatotev 
12cf58b2d4SBoyan Karatotev /* Cortex-X3 loop count for CVE-2022-23960 mitigation */
13cf58b2d4SBoyan Karatotev #define CORTEX_X3_BHB_LOOP_COUNT		U(132)
14cf58b2d4SBoyan Karatotev 
15cf58b2d4SBoyan Karatotev /*******************************************************************************
16cf58b2d4SBoyan Karatotev  * CPU Extended Control register specific definitions
17cf58b2d4SBoyan Karatotev  ******************************************************************************/
18cf58b2d4SBoyan Karatotev #define CORTEX_X3_CPUECTLR_EL1			S3_0_C15_C1_4
19cf58b2d4SBoyan Karatotev 
20cf58b2d4SBoyan Karatotev /*******************************************************************************
21cf58b2d4SBoyan Karatotev  * CPU Power Control register specific definitions
22cf58b2d4SBoyan Karatotev  ******************************************************************************/
23cf58b2d4SBoyan Karatotev #define CORTEX_X3_CPUPWRCTLR_EL1				S3_0_C15_C2_7
24cf58b2d4SBoyan Karatotev #define CORTEX_X3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT			U(1)
25c7e698cfSHarrison Mutai #define CORTEX_X3_CPUPWRCTLR_EL1_WFI_RET_CTRL_BITS_SHIFT	U(4)
26c7e698cfSHarrison Mutai #define CORTEX_X3_CPUPWRCTLR_EL1_WFE_RET_CTRL_BITS_SHIFT	U(7)
27cf58b2d4SBoyan Karatotev 
2879544126SBoyan Karatotev /*******************************************************************************
29a65c5ba3SBipin Ravi  * CPU Auxiliary Control register specific definitions.
30a65c5ba3SBipin Ravi  ******************************************************************************/
31a65c5ba3SBipin Ravi #define CORTEX_X3_CPUACTLR_EL1			S3_0_C15_C1_0
32a65c5ba3SBipin Ravi 
33a65c5ba3SBipin Ravi /*******************************************************************************
3479544126SBoyan Karatotev  * CPU Auxiliary Control register 2 specific definitions.
3579544126SBoyan Karatotev  ******************************************************************************/
3679544126SBoyan Karatotev #define CORTEX_X3_CPUACTLR2_EL1			S3_0_C15_C1_1
3779544126SBoyan Karatotev #define CORTEX_X3_CPUACTLR2_EL1_BIT_36		(ULL(1) << 36)
3879544126SBoyan Karatotev 
395b0e4438SSona Mathew /*******************************************************************************
405b0e4438SSona Mathew  * CPU Auxiliary Control register 5 specific definitions.
415b0e4438SSona Mathew  ******************************************************************************/
425b0e4438SSona Mathew #define CORTEX_X3_CPUACTLR5_EL1			S3_0_C15_C8_0
435b0e4438SSona Mathew #define CORTEX_X3_CPUACTLR5_EL1_BIT_55		(ULL(1) << 55)
445b0e4438SSona Mathew #define CORTEX_X3_CPUACTLR5_EL1_BIT_56		(ULL(1) << 56)
455b0e4438SSona Mathew 
462454316cSSona Mathew /*******************************************************************************
47c1aa3fa5SBipin Ravi  * CPU Auxiliary Control register 6 specific definitions.
48c1aa3fa5SBipin Ravi  ******************************************************************************/
49c1aa3fa5SBipin Ravi #define CORTEX_X3_CPUACTLR6_EL1			S3_0_C15_C8_1
50c1aa3fa5SBipin Ravi 
51c1aa3fa5SBipin Ravi /*******************************************************************************
52355ce0a4SSona Mathew  * CPU Auxiliary Control register 3 specific definitions.
53355ce0a4SSona Mathew  ******************************************************************************/
54355ce0a4SSona Mathew #define CORTEX_X3_CPUACTLR3_EL1			S3_0_C15_C1_2
55355ce0a4SSona Mathew #define CORTEX_X3_CPUACTLR3_EL1_BIT_47		(ULL(1) << 47)
56355ce0a4SSona Mathew 
57*77feb745SGovindraj Raja #ifndef __ASSEMBLER__
58*77feb745SGovindraj Raja long check_erratum_cortex_x3_3701769(long cpu_rev);
59*77feb745SGovindraj Raja #endif /* __ASSEMBLER__ */
60*77feb745SGovindraj Raja 
61cf58b2d4SBoyan Karatotev #endif /* CORTEX_X3_H */
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