Searched hist:"7623 e085cb5396054b72f1ea3f02e8c7a34568b5" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp_context.c | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|
| H A D | tsp.mk | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|
| H A D | tsp_main.c | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|
| /rk3399_ARM-atf/include/bl32/tsp/ |
| H A D | tsp_el1_context.h | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|
| H A D | tsp.h | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|
| /rk3399_ARM-atf/services/spd/tspd/ |
| H A D | tspd_main.c | 7623e085cb5396054b72f1ea3f02e8c7a34568b5 Wed Sep 11 12:29:07 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
|