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| /rk3399_ARM-atf/include/lib/extensions/ |
| H A D | sve.h | 6d5319afecf62f931fe03c12f2dbc398e959c7f0 Mon Jun 17 20:22:36 UTC 2024 Madhukar Pappireddy <madhukar.pappireddy@arm.com> feat(simd): add routines to save, restore sve state
This adds assembly routines to save and restore SVE registers. In order
to share between FPU and SVE the code to save and restore FPCR and
FPSR, the patch converts code for those registers into macro.
Since we will be using simd_ctx_t to save and restore FPU also, we use
offsets in simd_ctx_t for FPSR and FPCR. Since simd_ctx_t has the same
structure at the beginning as fp_regs_t, those offsets should be the
same as CTX_FP_* offsets, when SVE is not enabled. Note that the code
also saves and restores FPEXC32 reg along with FPSR and FPCR.
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I120c02359794aa6bb6376a464a9afe98bd84ae60
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| /rk3399_ARM-atf/lib/el3_runtime/aarch64/ |
| H A D | context.S | 6d5319afecf62f931fe03c12f2dbc398e959c7f0 Mon Jun 17 20:22:36 UTC 2024 Madhukar Pappireddy <madhukar.pappireddy@arm.com> feat(simd): add routines to save, restore sve state
This adds assembly routines to save and restore SVE registers. In order
to share between FPU and SVE the code to save and restore FPCR and
FPSR, the patch converts code for those registers into macro.
Since we will be using simd_ctx_t to save and restore FPU also, we use
offsets in simd_ctx_t for FPSR and FPCR. Since simd_ctx_t has the same
structure at the beginning as fp_regs_t, those offsets should be the
same as CTX_FP_* offsets, when SVE is not enabled. Note that the code
also saves and restores FPEXC32 reg along with FPSR and FPCR.
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I120c02359794aa6bb6376a464a9afe98bd84ae60
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