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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | cadence_qspi.h | 6b7eb4157f46046b58dfcb5a360697a3ea90ad5b Tue Jan 23 23:13:09 UTC 2018 Jason Rush <jarush@gmail.com> UPSTREAM: spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Change-Id: Ic221ac76abf1a32a027b9650bc6f27667209c77c
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 15a70a5da33229de884f60684a562ea60fe505b2)
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| H A D | cadence_qspi.c | 6b7eb4157f46046b58dfcb5a360697a3ea90ad5b Tue Jan 23 23:13:09 UTC 2018 Jason Rush <jarush@gmail.com> UPSTREAM: spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Change-Id: Ic221ac76abf1a32a027b9650bc6f27667209c77c
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 15a70a5da33229de884f60684a562ea60fe505b2)
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| H A D | cadence_qspi_apb.c | 6b7eb4157f46046b58dfcb5a360697a3ea90ad5b Tue Jan 23 23:13:09 UTC 2018 Jason Rush <jarush@gmail.com> UPSTREAM: spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Change-Id: Ic221ac76abf1a32a027b9650bc6f27667209c77c
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 15a70a5da33229de884f60684a562ea60fe505b2)
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