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/rk3399_rockchip-uboot/drivers/net/
H A Ddwc_eth_qos.h65dd574d8d6e68c77ecaff63e096d28625764c50 Sat May 09 11:23:24 UTC 2020 David Wu <david.wu@rock-chips.com> net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip

The Rockchip CSR clock range is from 100M to 150M, add
EQOS_MAC_MDIO_ADDRESS_CR_100_150.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ib60f306cb9e8abec9557e92a6d04d76a7071b9ea