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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra20/
H A Dclock-tables.h65530a842eeaf7ad07e0613ac6f883f2f1f1e33f Tue Sep 25 20:21:13 UTC 2012 Lucas Stach <dev@lynxeye.de> tegra20: add clock_set_pllout function

Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.

This function adds a clean way to do so.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/
H A Dclk_rst.h65530a842eeaf7ad07e0613ac6f883f2f1f1e33f Tue Sep 25 20:21:13 UTC 2012 Lucas Stach <dev@lynxeye.de> tegra20: add clock_set_pllout function

Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.

This function adds a clean way to do so.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
H A Dclock.h65530a842eeaf7ad07e0613ac6f883f2f1f1e33f Tue Sep 25 20:21:13 UTC 2012 Lucas Stach <dev@lynxeye.de> tegra20: add clock_set_pllout function

Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.

This function adds a clean way to do so.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>