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/rk3399_rockchip-uboot/board/freescale/vf610twr/
H A Dvf610twr.c56d83d1c046c693b65ab09c0e960d922ec639c2b Wed Apr 23 16:17:51 UTC 2014 Stefan Agner <stefan@agner.ch> arm: vf610: add DDR_SEL_PAD_CONTR register

Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.

Signed-off-by: Stefan Agner <stefan@agner.ch>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h56d83d1c046c693b65ab09c0e960d922ec639c2b Wed Apr 23 16:17:51 UTC 2014 Stefan Agner <stefan@agner.ch> arm: vf610: add DDR_SEL_PAD_CONTR register

Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.

Signed-off-by: Stefan Agner <stefan@agner.ch>