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/rk3399_ARM-atf/drivers/nxp/clk/s32cc/
H A Ds32cc_early_clks.c5300040bfd0acf0e839a9828a1a5341afc936e36 Mon Sep 09 10:00:26 UTC 2024 Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> feat(nxp-clk): refactor clock enablement

Simplify the clock enablement mechanism from a usage perspective. With
this new approach, enabling a clock cascades the turn-on sequence of all
its parent clocks in the clock tree. Therefore, enabling the A53 clock
will also turn on the A53 PLL and the oscillator that feeds it.

Change-Id: Ifc2bee3e9edbb4baced34f9e809a961562f7d0a6
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
H A Ds32cc_clk_drv.c5300040bfd0acf0e839a9828a1a5341afc936e36 Mon Sep 09 10:00:26 UTC 2024 Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> feat(nxp-clk): refactor clock enablement

Simplify the clock enablement mechanism from a usage perspective. With
this new approach, enabling a clock cascades the turn-on sequence of all
its parent clocks in the clock tree. Therefore, enabling the A53 clock
will also turn on the A53 PLL and the oscillator that feeds it.

Change-Id: Ifc2bee3e9edbb4baced34f9e809a961562f7d0a6
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>