Searched hist:"5056 c8e068e30c73d3653f0b2cabbae46174a165" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | fsl_srio.h | 5056c8e068e30c73d3653f0b2cabbae46174a165 Thu Mar 08 00:33:21 UTC 2012 Liu Gang <Gang.Liu@freescale.com> powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | srio.c | 5056c8e068e30c73d3653f0b2cabbae46174a165 Thu Mar 08 00:33:21 UTC 2012 Liu Gang <Gang.Liu@freescale.com> powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init.c | 5056c8e068e30c73d3653f0b2cabbae46174a165 Thu Mar 08 00:33:21 UTC 2012 Liu Gang <Gang.Liu@freescale.com> powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
|
| /rk3399_rockchip-uboot/include/configs/ |
| H A D | corenet_ds.h | 5056c8e068e30c73d3653f0b2cabbae46174a165 Thu Mar 08 00:33:21 UTC 2012 Liu Gang <Gang.Liu@freescale.com> powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
|